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Verification jobs in Taiwan

1 to 40 of 219 verification jobs

Sr. Applications Engineer For Physical Verification
Company: Synopsys |

Location: Hsinchu City, Taiwan

| Salary: unspecified | Posted: 03 Feb 2018

Sr. Applications Engineer for Physical Verification Requisition Number 16386BR Hiring Location(s) TAIWAN - Hsinchu...
Senior Mixed Signal Design Verification Engineer
Company: Nvidia |

Location: Taipei City, Taiwan

| Salary: unspecified | Posted: 21 Jan 2018

MEMIO platform for the future of computing. What you'll be doing As a key member of our circuit verification team..., you will verify the design and implementation of the industry's leading GPU You will be responsible for verification of the Mixed...
Senior Verification Engineer
Company: Michael Page |

Location: Taipei City, Taiwan

| Salary: unspecified | Posted: 05 Jan 2018

of improving SoC and IP level verification coverage while optimizing verification times, maintaining a state of the art methodology... verification plan & coverage model, and improve methodology. -Develop testbench, test cases, reference model, coverage model...
Asic Design Verification Engineer
Company: Western Digital |

Location: Hsinchu County, Taiwan

| Salary: unspecified | Posted: 29 Dec 2017

and other metrics.Support module and sub-system level verification for SoCWork closely with ASIC design team to triage and resolve....QUALIFICATIONS:Education RequirementsBS/MS in EE/CE, plus 5+ years of Design Verification experienceFamiliarity with ASIC, Computer...
Asic Design Verification Engineer
Company: Western Digital |

Location: Hsinchu County, Taiwan

| Salary: unspecified | Posted: 29 Dec 2017

and other metrics.Support module and sub-system level verification for SoCWork closely with ASIC design team to triage and resolve....QUALIFICATIONS:Education RequirementsBS/MS in EE/CE, plus 5+ years of Design Verification experienceFamiliarity with ASIC, Computer...
Asic Design Verification Engineer
Company: Western Digital |

Location: Hsinchu County, Taiwan

| Salary: unspecified | Posted: 29 Dec 2017

and other metrics.Support module and sub-system level verification for SoCWork closely with ASIC design team to triage and resolve....QUALIFICATIONS:Education RequirementsBS/MS in EE/CE, plus 5+ years of Design Verification experienceFamiliarity with ASIC, Computer...
Asic Design Verification Engineer
Company: Western Digital |

Location: Hsinchu County, Taiwan

| Salary: unspecified | Posted: 29 Dec 2017

and other metrics.Support module and sub-system level verification for SoCWork closely with ASIC design team to triage and resolve....QUALIFICATIONS:Education RequirementsBS/MS in EE/CE, plus 5+ years of Design Verification experienceFamiliarity with ASIC, Computer...
Applications Engineer - Functional Verification
Company: unknown |

Location: East District Hsinchu City, Taiwan

| Salary: unspecified | Posted: 19 Dec 2017

(RTL) digital logic design, functional verification methodology, and ESL a plus. This experience should include some of the... followings: * Verilog HDL simulation, verification methodology and language such as System Verilog, UVM, OVM, & SVA...
Principal Engr, Asic Design Verification
Company: Western Digital |

Location: Hsinchu County, Taiwan

| Salary: unspecified | Posted: 17 Dec 2017

Job Description: Job Description Looking for ASIC Verification Engineer, responsible for. Development of ASIC... verification and Validation plans. Development of UVM or C test cases for ASIC verification and validation to achieve...
Principal Verification Engineer
Company: Western Digital |

Location: Hsinchu County, Taiwan

| Salary: unspecified | Posted: 17 Dec 2017

Responsibilities: This position is primarily responsible for block and system level verification. Following is the... list of must have attributes: Must have competencies: Competent in system Verilog, UVM verification flows Coverage...
Principal Engr, Asic Design Verification
Company: Western Digital |

Location: Hsinchu County, Taiwan

| Salary: unspecified | Posted: 17 Dec 2017

Looking for ASIC Verification Engineer, responsible for: Development of ASIC verification and Validation plans... Development of UVM and C test cases for ASIC verification and validation to achieve comprehensive coverage Working with ASIC...
Senior Verification Engineer
Company: Michael Page |

Location: Taipei City, Taiwan

| Salary: unspecified | Posted: 22 Nov 2017

of improving SoC and IP level verification coverage while optimizing verification times, maintaining a state of the art methodology... verification plan & coverage model, and improve methodology. -Develop testbench, test cases, reference model, coverage model...
Senior Verification Engineer
Company: Michael Page |

Location: Taipei City, Taiwan

| Salary: unspecified | Posted: 15 Nov 2017

of improving SoC and IP level verification coverage while optimizing verification times, maintaining a state of the art methodology... verification plan & coverage model, and improve methodology. -Develop testbench, test cases, reference model, coverage model...
Senior Verification Engineer
Company: Michael Page |

Location: Taipei City, Taiwan

| Salary: unspecified | Posted: 28 Oct 2017

of improving SoC and IP level verification coverage while optimizing verification times, maintaining a state of the art methodology... verification plan & coverage model, and improve methodology. -Develop testbench, test cases, reference model, coverage model...
Staff Cpu Verification Engineer
Company: ARM |

Location: Hsinchu City, Taiwan

| Salary: unspecified | Posted: 26 Oct 2017

Staff CPU Verification Engineer About the role Since announced in Computex 2014, Arm has established its 4th world... development team in Hsinchu, Taiwan. This team will be responsible for the design, verification and delivery of complete Arm M...
Senior Verification Engineer
Company: Michael Page |

Location: Taipei City, Taiwan

| Salary: unspecified | Posted: 19 Oct 2017

of improving SoC and IP level verification coverage while optimizing verification times, maintaining a state of the art methodology... verification plan & coverage model, and improve methodology. -Develop testbench, test cases, reference model, coverage model...
Power Electrical Engineer (verification Testing )
Company: Hewlett Packard Enterprise |

Location: Taipei City, Taiwan

| Salary: unspecified | Posted: 19 Oct 2017

Power Electrical Engineer (Verification Testing ) Job Description: Hewlett Packard Enterprise is an industry... and validation analyses and empirical testing on new and modified designs. Responsibilities: Performs verification testing on new...
Ic Verification Sr. Engineer
Company: unknown |

Location: Hsinchu City - Tainan City, Taiwan

| Salary: unspecified | Posted: 15 Feb 2018

IC Verification Sr. Engineer Company Nationality Taiwan Working Location HsinChu City/County/Tainan Cit Academic...scripts。 - 熟悉Formal Verification Tool(e.g. Cadence Jasper, Synopsys Magellan),並在計劃中使用這些EDA工具。 - 熟悉CRV(Constraint random...
Behavior Model And Digital Verification (senior)engineer(rdc-dd)
Company: unknown |

Location: Jhubei, Hsinchu County, Taiwan

| Salary: unspecified | Posted: 12 Feb 2018

1.熟悉 verilog-A/AMS, wreal , verilog model 2.熟悉 Universal verification Methodology (UVM) 3.熟悉 Digital degisgn flow...
數位design Verification工程師
Company: unknown |

Location: Jhubei, Hsinchu County, Taiwan

| Salary: unspecified | Posted: 25 Dec 2017

Design Verification Engineer - Language skills - SystemVerilog, Perl, Assembly, C, C++ - develop verification plan...